A team of engineers from top US universities and SkyWater Technology developed a multilayered 3D chip that could usher in a new era for hardware supporting AI. Its vertical design and dense integration of memory with processing units remove a major bottleneck of traditional 2D integrated circuits—the “memory wall.”
By stacking layers directly atop one another and using extremely tight connections, the chip significantly shortens data transfer distances and frees the system from data waiting. Consequently, the prototype already exhibits fourfold superiority over counterparts, and simulations of future versions with more layers suggest potential performance gains up to 12 times greater.
According to researchers, this architecture is capable of delivering a 100–1000-fold improvement in the power-delay product—a crucial metric for energy efficiency. The vertical methodology lowers the energy consumed per operation and boosts throughput, achievements that were long unattainable for 2D chips.
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